The present invention relates to semi-conductor devices of the field effect transistor type, more especially those whose gates are shorter than the mean free path of the electrons in the semi-conductor material.
Known field effect transistors operate either in a plane structure, the current flowing in the plane of the semi-conductor material wafer, or in a vertical structure, the current flowing perpendicularly to this same plane.
MESFET transistors (Metal Schottky Field Effect Transistors), since they have a so-called planar structure, have on the free face of the wafer the ohmic source and drain contacts and the Schottky gate contact. The MESFETs perform well in the ultra high frequency ranges as well as in logic circuits. However, in order to improve their characteristics at very high frequency or with very low switching time, the length of the gate must be reduced to dimensions of 0.1 micron or less. Such a reduction of the gate length is not easy with "planar" technology, and is limited by masking techniques.
The Gridistor (French Patent No. 1 317 256 of 16th Dec. 1961 and additions thereto) is a junction field effect transistor, with vertical structure having a large number of gate in parallel. It is then a device developing a great deal of power. But its operating frequency is low because of the high parasite capacities and a high gate resistance. Furthermore, because of its structure, the smaller the gate length, the higher this resistance.
It is to palliate the disadvantages met with in common transistors of MESFET and Gridistor type, particularly in the operating frequency, that new field effect transistor structures having very short gate lengths and low gate resistances and source and drain accesses have been perfected.